From bcaa976078a3916bf8c54a824a4c7cb3d5bce2fb Mon Sep 17 00:00:00 2001 From: jc_gargma Date: Sun, 9 May 2021 17:47:57 -0700 Subject: Updated to 5.12.2 --- ...R-support-when-the-DPCD-rev-less-than-1.4.patch | 167 --------------------- 1 file changed, 167 deletions(-) delete mode 100644 0004-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-less-than-1.4.patch (limited to '0004-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-less-than-1.4.patch') diff --git a/0004-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-less-than-1.4.patch b/0004-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-less-than-1.4.patch deleted file mode 100644 index d28bf99..0000000 --- a/0004-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-less-than-1.4.patch +++ /dev/null @@ -1,167 +0,0 @@ -From 558b94d31689b8c3673d3447888385f60ef99197 Mon Sep 17 00:00:00 2001 -From: Imre Deak -Date: Wed, 17 Mar 2021 21:01:49 +0200 -Subject: drm/i915: Disable LTTPR support when the DPCD rev < 1.4 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Cherry picked from intel-drm-next 264613b406eb0d74cd9ca582c717c5e2c5a975ea - -By the specification the 0xF0000-0xF02FF range is only valid when the -DPCD revision is 1.4 or higher. Disable LTTPR support if this isn't so. - -Trying to detect LTTPRs returned corrupted values for the above DPCD -range at least on a Skylake host with an LG 43UD79-B monitor with a DPCD -revision 1.2 connected. - -v2: Add the actual version check. -v3: Fix s/DRPX/DPRX/ typo. - -Fixes: 7b2a4ab8b0ef ("drm/i915: Switch to LTTPR transparent mode link training") -Cc: # v5.11 -Cc: Ville Syrjälä -Signed-off-by: Imre Deak -Reviewed-by: Ville Syrjälä -Link: https://patchwork.freedesktop.org/patch/msgid/20210317190149.4032966-1-imre.deak@intel.com ---- - drivers/gpu/drm/i915/display/intel_dp.c | 4 +- - .../gpu/drm/i915/display/intel_dp_link_training.c | 48 +++++++++++++++++----- - .../gpu/drm/i915/display/intel_dp_link_training.h | 2 +- - 3 files changed, 39 insertions(+), 15 deletions(-) - -diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c -index 1930df9a8bcc..bc2aae63fe40 100644 ---- a/drivers/gpu/drm/i915/display/intel_dp.c -+++ b/drivers/gpu/drm/i915/display/intel_dp.c -@@ -4878,9 +4878,7 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp) - { - int ret; - -- intel_dp_lttpr_init(intel_dp); -- -- if (drm_dp_read_dpcd_caps(&intel_dp->aux, intel_dp->dpcd)) -+ if (intel_dp_init_lttpr_and_dprx_caps(intel_dp) < 0) - return false; - - /* -diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c -index 0359d5936901..e6532ea5757b 100644 ---- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c -+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c -@@ -34,6 +34,11 @@ intel_dp_dump_link_status(const u8 link_status[DP_LINK_STATUS_SIZE]) - link_status[3], link_status[4], link_status[5]); - } - -+static void intel_dp_reset_lttpr_common_caps(struct intel_dp *intel_dp) -+{ -+ memset(&intel_dp->lttpr_common_caps, 0, sizeof(intel_dp->lttpr_common_caps)); -+} -+ - static void intel_dp_reset_lttpr_count(struct intel_dp *intel_dp) - { - intel_dp->lttpr_common_caps[DP_PHY_REPEATER_CNT - -@@ -95,8 +100,7 @@ static bool intel_dp_read_lttpr_common_caps(struct intel_dp *intel_dp) - - if (drm_dp_read_lttpr_common_caps(&intel_dp->aux, - intel_dp->lttpr_common_caps) < 0) { -- memset(intel_dp->lttpr_common_caps, 0, -- sizeof(intel_dp->lttpr_common_caps)); -+ intel_dp_reset_lttpr_common_caps(intel_dp); - return false; - } - -@@ -118,30 +122,49 @@ intel_dp_set_lttpr_transparent_mode(struct intel_dp *intel_dp, bool enable) - } - - /** -- * intel_dp_lttpr_init - detect LTTPRs and init the LTTPR link training mode -+ * intel_dp_init_lttpr_and_dprx_caps - detect LTTPR and DPRX caps, init the LTTPR link training mode - * @intel_dp: Intel DP struct - * -- * Read the LTTPR common capabilities, switch to non-transparent link training -- * mode if any is detected and read the PHY capabilities for all detected -- * LTTPRs. In case of an LTTPR detection error or if the number of -+ * Read the LTTPR common and DPRX capabilities and switch to non-transparent -+ * link training mode if any is detected and read the PHY capabilities for all -+ * detected LTTPRs. In case of an LTTPR detection error or if the number of - * LTTPRs is more than is supported (8), fall back to the no-LTTPR, - * transparent mode link training mode. - * - * Returns: -- * >0 if LTTPRs were detected and the non-transparent LT mode was set -+ * >0 if LTTPRs were detected and the non-transparent LT mode was set. The -+ * DPRX capabilities are read out. - * 0 if no LTTPRs or more than 8 LTTPRs were detected or in case of a -- * detection failure and the transparent LT mode was set -+ * detection failure and the transparent LT mode was set. The DPRX -+ * capabilities are read out. -+ * <0 Reading out the DPRX capabilities failed. - */ --int intel_dp_lttpr_init(struct intel_dp *intel_dp) -+int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp) - { - int lttpr_count; - bool ret; - int i; - - ret = intel_dp_read_lttpr_common_caps(intel_dp); -+ -+ /* The DPTX shall read the DPRX caps after LTTPR detection. */ -+ if (drm_dp_read_dpcd_caps(&intel_dp->aux, intel_dp->dpcd)) { -+ intel_dp_reset_lttpr_common_caps(intel_dp); -+ return -EIO; -+ } -+ - if (!ret) - return 0; - -+ /* -+ * The 0xF0000-0xF02FF range is only valid if the DPCD revision is -+ * at least 1.4. -+ */ -+ if (intel_dp->dpcd[DP_DPCD_REV] < 0x14) { -+ intel_dp_reset_lttpr_common_caps(intel_dp); -+ return 0; -+ } -+ - lttpr_count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps); - /* - * Prevent setting LTTPR transparent mode explicitly if no LTTPRs are -@@ -181,7 +204,7 @@ int intel_dp_lttpr_init(struct intel_dp *intel_dp) - - return lttpr_count; - } --EXPORT_SYMBOL(intel_dp_lttpr_init); -+EXPORT_SYMBOL(intel_dp_init_lttpr_and_dprx_caps); - - static u8 dp_voltage_max(u8 preemph) - { -@@ -817,7 +840,10 @@ void intel_dp_start_link_train(struct intel_dp *intel_dp, - * TODO: Reiniting LTTPRs here won't be needed once proper connector - * HW state readout is added. - */ -- int lttpr_count = intel_dp_lttpr_init(intel_dp); -+ int lttpr_count = intel_dp_init_lttpr_and_dprx_caps(intel_dp); -+ -+ if (lttpr_count < 0) -+ return; - - if (!intel_dp_link_train_all_phys(intel_dp, crtc_state, lttpr_count)) - intel_dp_schedule_fallback_link_training(intel_dp, crtc_state); -diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.h b/drivers/gpu/drm/i915/display/intel_dp_link_training.h -index 6a1f76bd8c75..9cb7c28027f0 100644 ---- a/drivers/gpu/drm/i915/display/intel_dp_link_training.h -+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.h -@@ -11,7 +11,7 @@ - struct intel_crtc_state; - struct intel_dp; - --int intel_dp_lttpr_init(struct intel_dp *intel_dp); -+int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp); - - void intel_dp_get_adjust_train(struct intel_dp *intel_dp, - const struct intel_crtc_state *crtc_state, --- -cgit v1.2.3-1-gf6bb5 - -- cgit v1.2.1