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-rw-r--r--drivers/ports.h47
1 files changed, 47 insertions, 0 deletions
diff --git a/drivers/ports.h b/drivers/ports.h
new file mode 100644
index 0000000..338c3b8
--- /dev/null
+++ b/drivers/ports.h
@@ -0,0 +1,47 @@
+#pragma once
+
+template <typename T>
+concept port_data_t = (is_same<T, uint8_t>::value || is_same<T, uint16_t>::value || is_same<T, uint32_t>::value);
+
+template <uint16_t port_num, port_data_t T>
+class Port {
+public:
+ [[nodiscard]] T read() {
+ T result;
+
+ switch (sizeof(T)) {
+ case 1:
+ asm volatile("inb %1, %0" : "=a"(result) : "Nd"(port_num));
+ break;
+ case 2:
+ asm volatile("inw %1, %0" : "=a"(result) : "Nd"(port_num));
+ break;
+ case 4:
+ asm volatile("inl %1, %0" : "=a"(result) : "Nd"(port_num));
+ break;
+ }
+
+ return result;
+ }
+
+ void write(T data) {
+ switch (sizeof(T)) {
+ case 1:
+ asm volatile("outb %0, %1" : : "a"(data), "Nd"(port_num));
+ break;
+ case 2:
+ asm volatile("outw %0, %1" : : "a"(data), "Nd"(port_num));
+ break;
+ case 4:
+ asm volatile("outl %0, %1" : : "a"(data), "Nd"(port_num));
+ break;
+ }
+ }
+};
+
+/* Ports 0x3d0 to 0x3df are reserved for CGA; each port is 1 byte wide */
+typedef Port<0x3d4, uint8_t> cga_idx_port;
+typedef Port<0x3d5, uint8_t> cga_dat_port;
+// 0x3d8 : mode select register
+// 0x3d8 : color control register
+// 0x3da : status register