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authoraqua <aqua@iserlohn-fortress.net>2022-10-29 11:26:44 +0300
committeraqua <aqua@iserlohn-fortress.net>2022-10-29 11:26:44 +0300
commitc4fcc92183c55db868d0d6ae53e6009fb2e53ee5 (patch)
treead5ef50aa07465e11f779c4482e20e6071182e9c /i686/sys
parentmakefile: add libk target (diff)
downloadkernel-c4fcc92183c55db868d0d6ae53e6009fb2e53ee5.tar.xz
makefile: add i686/arch.a target
Diffstat (limited to 'i686/sys')
-rw-r--r--i686/sys/control.h9
-rw-r--r--i686/sys/cpuid.h35
-rw-r--r--i686/sys/io.h79
3 files changed, 123 insertions, 0 deletions
diff --git a/i686/sys/control.h b/i686/sys/control.h
new file mode 100644
index 0000000..a40a67f
--- /dev/null
+++ b/i686/sys/control.h
@@ -0,0 +1,9 @@
+#pragma once
+
+static void
+abort()
+{
+ asm volatile(R"(cli
+h: hlt
+jmp h)");
+}
diff --git a/i686/sys/cpuid.h b/i686/sys/cpuid.h
new file mode 100644
index 0000000..f2ffe37
--- /dev/null
+++ b/i686/sys/cpuid.h
@@ -0,0 +1,35 @@
+#pragma once
+
+#include <cpuid.h>
+
+struct CPUVersion {
+ unsigned int stepping : 4;
+ unsigned int model : 4;
+ unsigned int family : 4;
+ unsigned int type : 2;
+ unsigned int __unused_1 : 2;
+ unsigned int model_ex : 4;
+ unsigned int family_ex : 8;
+ unsigned int __unused_2 : 4;
+} __attribute__((packed, aligned(__alignof__(unsigned int))));
+_Static_assert(sizeof(struct CPUVersion) == sizeof(unsigned int));
+
+unsigned int
+family(const struct CPUVersion v)
+{
+ if (v.family == 0x0f) return v.family + v.family_ex;
+ else
+ return v.family;
+}
+
+unsigned int
+model(const struct CPUVersion v)
+{
+ switch (v.family) {
+ case 0x06:
+ case 0x0f:
+ return ((unsigned int)v.model_ex << 4) | v.model;
+ default:
+ return v.model;
+ }
+}
diff --git a/i686/sys/io.h b/i686/sys/io.h
new file mode 100644
index 0000000..74d4950
--- /dev/null
+++ b/i686/sys/io.h
@@ -0,0 +1,79 @@
+#pragma once
+
+static inline void
+outb(unsigned char val, unsigned short port)
+{
+ asm volatile("outb %0,%1" : : "a"(val), "dN"(port));
+}
+
+static inline void
+outw(unsigned short val, unsigned short port)
+{
+ asm volatile("outw %0,%1" : : "a"(val), "dN"(port));
+}
+
+static inline void
+outl(unsigned int val, unsigned short port)
+{
+ asm volatile("outl %0,%1" : : "a"(val), "dN"(port));
+}
+
+static inline unsigned char
+inb(unsigned short port)
+{
+ unsigned char val;
+ asm volatile("inb %1,%0" : "=a"(val) : "dN"(port));
+ return val;
+}
+
+static inline unsigned short
+inw(unsigned short port)
+{
+ unsigned short val;
+ asm volatile("inw %1,%0" : "=a"(val) : "dN"(port));
+ return val;
+}
+
+static inline unsigned int
+inl(unsigned short port)
+{
+ unsigned int val;
+ asm volatile("inl %1,%0" : "=a"(val) : "dN"(port));
+ return val;
+}
+
+static inline void
+outsb(unsigned short port, const void *__buf, unsigned long __n)
+{
+ asm volatile("cld; rep; outsb" : "+S"(__buf), "+c"(__n) : "d"(port));
+}
+
+static inline void
+outsw(unsigned short port, const void *__buf, unsigned long __n)
+{
+ asm volatile("cld; rep; outsw" : "+S"(__buf), "+c"(__n) : "d"(port));
+}
+
+static inline void
+outsl(unsigned short port, const void *__buf, unsigned long __n)
+{
+ asm volatile("cld; rep; outsl" : "+S"(__buf), "+c"(__n) : "d"(port));
+}
+
+static inline void
+insb(unsigned short port, void *__buf, unsigned long __n)
+{
+ asm volatile("cld; rep; insb" : "+D"(__buf), "+c"(__n) : "d"(port));
+}
+
+static inline void
+insw(unsigned short port, void *__buf, unsigned long __n)
+{
+ asm volatile("cld; rep; insw" : "+D"(__buf), "+c"(__n) : "d"(port));
+}
+
+static inline void
+insl(unsigned short port, void *__buf, unsigned long __n)
+{
+ asm volatile("cld; rep; insl" : "+D"(__buf), "+c"(__n) : "d"(port));
+}