diff options
| author | mark@chromium.org <mark@chromium.org> | 2015-04-15 19:28:11 +0000 |
|---|---|---|
| committer | mark@chromium.org <mark@chromium.org> | 2015-04-15 19:28:11 +0000 |
| commit | d88401cca9ff7640387a0d88d75de1e7d8fff294 (patch) | |
| tree | b47c776a127bb465572e382e752d5d63ca9b544c /src/client/linux/dump_writer_common | |
| parent | Use __NR_rt_sigaction instead of __NR_sigaction (diff) | |
| download | breakpad-d88401cca9ff7640387a0d88d75de1e7d8fff294.tar.xz | |
MIPS64: Initial MIPS64 related change.
With this change Breakpad can be compiled for MIPS64,
but it is not yet functional.
Patch by Gordana Cmiljanovic <Gordana.Cmiljanovic@imgtec.com>
Review URL: https://breakpad.appspot.com/6824002/
git-svn-id: http://google-breakpad.googlecode.com/svn/trunk@1446 4c0a9323-5329-0410-9bdc-e9ce6186880e
Diffstat (limited to 'src/client/linux/dump_writer_common')
| -rw-r--r-- | src/client/linux/dump_writer_common/thread_info.cc | 2 | ||||
| -rw-r--r-- | src/client/linux/dump_writer_common/ucontext_reader.cc | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/src/client/linux/dump_writer_common/thread_info.cc b/src/client/linux/dump_writer_common/thread_info.cc index 9fe253c6..a3072b6c 100644 --- a/src/client/linux/dump_writer_common/thread_info.cc +++ b/src/client/linux/dump_writer_common/thread_info.cc @@ -257,7 +257,9 @@ void ThreadInfo::FillCPUContext(RawContextCPU* out) const { out->float_save.regs[i] = fpregs.regs[i]; out->float_save.fpcsr = fpregs.fpcsr; +#if _MIPS_SIM == _ABIO32 out->float_save.fir = fpregs.fir; +#endif } #endif diff --git a/src/client/linux/dump_writer_common/ucontext_reader.cc b/src/client/linux/dump_writer_common/ucontext_reader.cc index b20a68bf..d37fdeb0 100644 --- a/src/client/linux/dump_writer_common/ucontext_reader.cc +++ b/src/client/linux/dump_writer_common/ucontext_reader.cc @@ -244,7 +244,9 @@ void UContextReader::FillCPUContext(RawContextCPU *out, const ucontext *uc) { out->float_save.regs[i] = uc->uc_mcontext.fpregs.fp_r.fp_dregs[i]; out->float_save.fpcsr = uc->uc_mcontext.fpc_csr; +#if _MIPS_SIM == _ABIO32 out->float_save.fir = uc->uc_mcontext.fpc_eir; // Unused. +#endif } #endif |