Updated to 5.11.13

7 files changed, 465 insertions, 85 deletions

diff --git a/0002-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTTPRs.patch b/0002-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTTPRs.patch
new file mode 100644
index 0000000..8d2f895
--- /dev/null
+++ b/0002-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTTPRs.patch
@@ -0,0 +1,107 @@
+From 073097c52c7b85d5d7902994ca3a67817d7aee8d Mon Sep 17 00:00:00 2001
+From: Imre Deak <imre.deak@intel.com>
+Date: Wed, 17 Mar 2021 20:48:59 +0200
+Subject: drm/i915/ilk-glk: Fix link training on links with LTTPRs
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Cherry-picked from intel-drm-next 984982f3ef7b240cd24c2feb2762d81d9d8da3c2
+
+The spec requires to use at least 3.2ms for the AUX timeout period if
+there are LT-tunable PHY Repeaters on the link (2.11.2). An upcoming
+spec update makes this more specific, by requiring a 3.2ms minimum
+timeout period for the LTTPR detection reading the 0xF0000-0xF0007
+range (3.6.5.1).
+
+Accordingly disable LTTPR detection until GLK, where the maximum timeout
+we can set is only 1.6ms.
+
+Link training in the non-transparent mode is known to fail at least on
+some SKL systems with a WD19 dock on the link, which exposes an LTTPR
+(see the References below). While this could have different reasons
+besides the too short AUX timeout used, not detecting LTTPRs (and so not
+using the non-transparent LT mode) fixes link training on these systems.
+
+While at it add a code comment about the platform specific maximum
+timeout values.
+
+v2: Add a comment about the g4x maximum timeout as well. (Ville)
+
+Reported-by: Takashi Iwai <tiwai@suse.de>
+Reported-and-tested-by: Santiago Zarate <santiago.zarate@suse.com>
+Reported-and-tested-by: Bodo Graumann <mail@bodograumann.de>
+References: https://gitlab.freedesktop.org/drm/intel/-/issues/3166
+Fixes: b30edfd8d0b4 ("drm/i915: Switch to LTTPR non-transparent mode link training")
+Cc: <stable@vger.kernel.org> # v5.11
+Cc: Takashi Iwai <tiwai@suse.de>
+Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Signed-off-by: Imre Deak <imre.deak@intel.com>
+Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20210317184901.4029798-2-imre.deak@intel.com
+---
+ drivers/gpu/drm/i915/display/intel_dp.c               |  7 +++++++
+ drivers/gpu/drm/i915/display/intel_dp_link_training.c | 15 ++++++++++++---
+ 2 files changed, 19 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
+index 8a26307c4896..1930df9a8bcc 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp.c
++++ b/drivers/gpu/drm/i915/display/intel_dp.c
+@@ -1400,6 +1400,7 @@ static u32 g4x_get_aux_send_ctl(struct intel_dp *intel_dp,
+ 	else
+ 		precharge = 5;
+ 
++	/* Max timeout value on G4x-BDW: 1.6ms */
+ 	if (IS_BROADWELL(dev_priv))
+ 		timeout = DP_AUX_CH_CTL_TIME_OUT_600us;
+ 	else
+@@ -1426,6 +1427,12 @@ static u32 skl_get_aux_send_ctl(struct intel_dp *intel_dp,
+ 	enum phy phy = intel_port_to_phy(i915, dig_port->base.port);
+ 	u32 ret;
+ 
++	/*
++	 * Max timeout values:
++	 * SKL-GLK: 1.6ms
++	 * CNL: 3.2ms
++	 * ICL+: 4ms
++	 */
+ 	ret = DP_AUX_CH_CTL_SEND_BUSY |
+ 	      DP_AUX_CH_CTL_DONE |
+ 	      DP_AUX_CH_CTL_INTERRUPT |
+diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+index d8c6d7054d11..f916b9f04b6b 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
++++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+@@ -93,6 +93,18 @@ static void intel_dp_read_lttpr_phy_caps(struct intel_dp *intel_dp,
+ 
+ static bool intel_dp_read_lttpr_common_caps(struct intel_dp *intel_dp)
+ {
++	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
++
++	if (intel_dp_is_edp(intel_dp))
++		return false;
++
++	/*
++	 * Detecting LTTPRs must be avoided on platforms with an AUX timeout
++	 * period < 3.2ms. (see DP Standard v2.0, 2.11.2, 3.6.6.1).
++	 */
++	if (INTEL_GEN(i915) < 10)
++		return false;
++
+ 	if (drm_dp_read_lttpr_common_caps(&intel_dp->aux,
+ 					  intel_dp->lttpr_common_caps) < 0) {
+ 		memset(intel_dp->lttpr_common_caps, 0,
+@@ -138,9 +150,6 @@ int intel_dp_lttpr_init(struct intel_dp *intel_dp)
+ 	bool ret;
+ 	int i;
+ 
+-	if (intel_dp_is_edp(intel_dp))
+-		return 0;
+-
+ 	ret = intel_dp_read_lttpr_common_caps(intel_dp);
+ 
+ 	/*
+-- 
+cgit v1.2.3-1-gf6bb5
+
diff --git a/0002-iommu-amd-Dont-initialise-remapping-irqdomain-if-IOMMU-is-disabled.patch b/0002-iommu-amd-Dont-initialise-remapping-irqdomain-if-IOMMU-is-disabled.patch
deleted file mode 100644
index c1cf8b6..0000000
--- a/0002-iommu-amd-Dont-initialise-remapping-irqdomain-if-IOMMU-is-disabled.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From cf3924542f2ddfcb6e33a5af274d08836ca9c27a Mon Sep 17 00:00:00 2001
-From: David Woodhouse <dwmw@amazon.co.uk>
-Date: Mon, 15 Mar 2021 11:15:02 +0000
-Subject: iommu/amd: Don't initialise remapping irqdomain if IOMMU is disabled
-
-When the IOMMU is disabled, the driver still enumerates and initialises
-the hardware in order to turn it off. Because IRQ remapping setup is
-done early, the irqdomain is set up opportunistically.
-
-In commit b34f10c2dc59 ("iommu/amd: Stop irq_remapping_select() matching
-when remapping is disabled") I already make the irq_remapping_select()
-function check the amd_iommu_irq_setup flag because that might get
-cleared only after the irqdomain setup is done, when the IVRS is parsed.
-
-However, in the case where 'amd_iommu=off' is passed on the command line,
-the IRQ remapping setup isn't done but the amd_iommu_irq_setup flag is
-still set by the early IRQ remap init code. Stop it doing that, by
-bailing out of amd_iommu_prepare() early when it's disabled.
-
-This avoids the crash in irq_remapping_select() as it dereferences the
-NULL amd_iommu_rlookup_table[]:
-
-[    0.243659] Switched APIC routing to physical x2apic.
-[    0.262206] BUG: kernel NULL pointer dereference, address: 0000000000000500
-[    0.262927] #PF: supervisor read access in kernel mode
-[    0.263390] #PF: error_code(0x0000) - not-present page
-[    0.263844] PGD 0 P4D 0
-[    0.264135] Oops: 0000 [#1] SMP PTI
-[    0.264460] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.12.0-rc3 #831
-[    0.265069] Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.14.0-1.fc33 04/01/2014
-[    0.265825] RIP: 0010:irq_remapping_select+0x57/0xb0
-[    0.266327] Code: 4b 0c 48 3d 30 e0 a7 9e 75 0d eb 35 48 8b 00 48 3d 30 e0 a7 9e 74 2a 0f b6 50 10 39 d1 75 ed 0f b7 40 12 48 8b 15 69 e3 d2 01 <48> 8b 14 c2 48 85 d2 74 0e b8 01 00 00 00 48 3b aa 90 04 00 00 74
-[    0.268412] RSP: 0000:ffffffff9e803db0 EFLAGS: 00010246
-[    0.268919] RAX: 00000000000000a0 RBX: ffffffff9e803df8 RCX: 0000000000000000
-[    0.269550] RDX: 0000000000000000 RSI: 0000000000000000 RDI: ffff98120112fe79
-[    0.270245] RBP: ffff9812011c8218 R08: 0000000000000001 R09: 000000000000000a
-[    0.270922] R10: 000000000000000a R11: f000000000000000 R12: ffff9812011c8218
-[    0.271549] R13: ffff98120181ed88 R14: 0000000000000000 R15: 0000000000000000
-[    0.272221] FS:  0000000000000000(0000) GS:ffff98127dc00000(0000) knlGS:0000000000000000
-[    0.272997] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
-[    0.273508] CR2: 0000000000000500 CR3: 0000000030810000 CR4: 00000000000006b0
-[    0.274178] Call Trace:
-[    0.274416]  irq_find_matching_fwspec+0x41/0xc0
-[    0.274812]  mp_irqdomain_create+0x65/0x150
-[    0.275251]  setup_IO_APIC+0x70/0x811
-
-Fixes: a1a785b57242 ("iommu/amd: Implement select() method on remapping irqdomain")
-Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=212017
-Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
----
- drivers/iommu/amd/init.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
-index 01da76dc1caa..3ea395ef4929 100644
---- a/drivers/iommu/amd/init.c
-+++ b/drivers/iommu/amd/init.c
-@@ -2997,6 +2997,9 @@ int __init amd_iommu_prepare(void)
- {
- 	int ret;
- 
-+	if (amd_iommu_disabled)
-+		return -ENODEV;
-+
- 	amd_iommu_irq_remap = true;
- 
- 	ret = iommu_go_to_state(IOMMU_ACPI_FINISHED);
--- 
-cgit v1.2.3-1-gf6bb5
-
diff --git a/0003-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-LTTPRs-are-detected.patch b/0003-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-LTTPRs-are-detected.patch
new file mode 100644
index 0000000..545767e
--- /dev/null
+++ b/0003-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-LTTPRs-are-detected.patch
@@ -0,0 +1,115 @@
+From 20a122b58cc3df0134c81396a7591397b8f361f2 Mon Sep 17 00:00:00 2001
+From: Imre Deak <imre.deak@intel.com>
+Date: Mon, 18 Jan 2021 20:31:43 +0200
+Subject: drm/i915/dp: Prevent setting the LTTPR LT mode if no LTTPRs are
+ detected
+
+Cherry-picked from 3b7bbb3619d2cc92f04ba10ad27d3b616aabf175
+
+Atm, the driver programs explicitly the default transparent link
+training mode (0x55) to DP_PHY_REPEATER_MODE even if no LTTPRs are
+detected.
+
+This conforms to the spec (3.6.6.1):
+"DP upstream devices that do not enable the Non-transparent mode of
+ LTTPRs shall program the PHY_REPEATER_MODE register (DPCD Address
+ F0003h) to 55h (default) prior to link training"
+
+however writing the default value to this DPCD register seems to cause
+occasional link training errors at least for a DELL WD19TB TBT dock, when
+no LTTPRs are detected.
+
+Writing to DP_PHY_REPEATER_MODE will also cause an unnecessary timeout
+on systems without any LTTPR.
+
+To fix the above two issues let's assume that setting the default mode
+is redundant when no LTTPRs are detected. Keep the existing behavior and
+program the default mode if more than 8 LTTPRs are detected or in case
+the read from DP_PHY_REPEATER_CNT returns an invalid value.
+
+References: https://gitlab.freedesktop.org/drm/intel/-/issues/2801
+Signed-off-by: Imre Deak <imre.deak@intel.com>
+Reviewed-by: Khaled Almahallawy <khaled.almahallawy@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20210118183143.1145707-1-imre.deak@intel.com
+---
+ .../gpu/drm/i915/display/intel_dp_link_training.c  | 36 +++++++++-------------
+ 1 file changed, 15 insertions(+), 21 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+index f916b9f04b6b..0359d5936901 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
++++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+@@ -34,18 +34,6 @@ intel_dp_dump_link_status(const u8 link_status[DP_LINK_STATUS_SIZE])
+ 		      link_status[3], link_status[4], link_status[5]);
+ }
+ 
+-static int intel_dp_lttpr_count(struct intel_dp *intel_dp)
+-{
+-	int count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps);
+-
+-	/*
+-	 * Pretend no LTTPRs in case of LTTPR detection error, or
+-	 * if too many (>8) LTTPRs are detected. This translates to link
+-	 * training in transparent mode.
+-	 */
+-	return count <= 0 ? 0 : count;
+-}
+-
+ static void intel_dp_reset_lttpr_count(struct intel_dp *intel_dp)
+ {
+ 	intel_dp->lttpr_common_caps[DP_PHY_REPEATER_CNT -
+@@ -151,6 +139,17 @@ int intel_dp_lttpr_init(struct intel_dp *intel_dp)
+ 	int i;
+ 
+ 	ret = intel_dp_read_lttpr_common_caps(intel_dp);
++	if (!ret)
++		return 0;
++
++	lttpr_count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps);
++	/*
++	 * Prevent setting LTTPR transparent mode explicitly if no LTTPRs are
++	 * detected as this breaks link training at least on the Dell WD19TB
++	 * dock.
++	 */
++	if (lttpr_count == 0)
++		return 0;
+ 
+ 	/*
+ 	 * See DP Standard v2.0 3.6.6.1. about the explicit disabling of
+@@ -159,17 +158,12 @@ int intel_dp_lttpr_init(struct intel_dp *intel_dp)
+ 	 */
+ 	intel_dp_set_lttpr_transparent_mode(intel_dp, true);
+ 
+-	if (!ret)
+-		return 0;
+-
+-	lttpr_count = intel_dp_lttpr_count(intel_dp);
+-
+ 	/*
+ 	 * In case of unsupported number of LTTPRs or failing to switch to
+ 	 * non-transparent mode fall-back to transparent link training mode,
+ 	 * still taking into account any LTTPR common lane- rate/count limits.
+ 	 */
+-	if (lttpr_count == 0)
++	if (lttpr_count < 0)
+ 		return 0;
+ 
+ 	if (!intel_dp_set_lttpr_transparent_mode(intel_dp, false)) {
+@@ -231,11 +225,11 @@ intel_dp_phy_is_downstream_of_source(struct intel_dp *intel_dp,
+ 				     enum drm_dp_phy dp_phy)
+ {
+ 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+-	int lttpr_count = intel_dp_lttpr_count(intel_dp);
++	int lttpr_count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps);
+ 
+-	drm_WARN_ON_ONCE(&i915->drm, lttpr_count == 0 && dp_phy != DP_PHY_DPRX);
++	drm_WARN_ON_ONCE(&i915->drm, lttpr_count <= 0 && dp_phy != DP_PHY_DPRX);
+ 
+-	return lttpr_count == 0 || dp_phy == DP_PHY_LTTPR(lttpr_count - 1);
++	return lttpr_count <= 0 || dp_phy == DP_PHY_LTTPR(lttpr_count - 1);
+ }
+ 
+ static u8 intel_dp_phy_voltage_max(struct intel_dp *intel_dp,
+-- 
+cgit v1.2.3-1-gf6bb5
+
diff --git a/0004-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-less-than-1.4.patch b/0004-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-less-than-1.4.patch
new file mode 100644
index 0000000..d28bf99
--- /dev/null
+++ b/0004-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-less-than-1.4.patch
@@ -0,0 +1,167 @@
+From 558b94d31689b8c3673d3447888385f60ef99197 Mon Sep 17 00:00:00 2001
+From: Imre Deak <imre.deak@intel.com>
+Date: Wed, 17 Mar 2021 21:01:49 +0200
+Subject: drm/i915: Disable LTTPR support when the DPCD rev < 1.4
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Cherry picked from intel-drm-next 264613b406eb0d74cd9ca582c717c5e2c5a975ea
+
+By the specification the 0xF0000-0xF02FF range is only valid when the
+DPCD revision is 1.4 or higher. Disable LTTPR support if this isn't so.
+
+Trying to detect LTTPRs returned corrupted values for the above DPCD
+range at least on a Skylake host with an LG 43UD79-B monitor with a DPCD
+revision 1.2 connected.
+
+v2: Add the actual version check.
+v3: Fix s/DRPX/DPRX/ typo.
+
+Fixes: 7b2a4ab8b0ef ("drm/i915: Switch to LTTPR transparent mode link training")
+Cc: <stable@vger.kernel.org> # v5.11
+Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Signed-off-by: Imre Deak <imre.deak@intel.com>
+Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20210317190149.4032966-1-imre.deak@intel.com
+---
+ drivers/gpu/drm/i915/display/intel_dp.c            |  4 +-
+ .../gpu/drm/i915/display/intel_dp_link_training.c  | 48 +++++++++++++++++-----
+ .../gpu/drm/i915/display/intel_dp_link_training.h  |  2 +-
+ 3 files changed, 39 insertions(+), 15 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
+index 1930df9a8bcc..bc2aae63fe40 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp.c
++++ b/drivers/gpu/drm/i915/display/intel_dp.c
+@@ -4878,9 +4878,7 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
+ {
+ 	int ret;
+ 
+-	intel_dp_lttpr_init(intel_dp);
+-
+-	if (drm_dp_read_dpcd_caps(&intel_dp->aux, intel_dp->dpcd))
++	if (intel_dp_init_lttpr_and_dprx_caps(intel_dp) < 0)
+ 		return false;
+ 
+ 	/*
+diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+index 0359d5936901..e6532ea5757b 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
++++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+@@ -34,6 +34,11 @@ intel_dp_dump_link_status(const u8 link_status[DP_LINK_STATUS_SIZE])
+ 		      link_status[3], link_status[4], link_status[5]);
+ }
+ 
++static void intel_dp_reset_lttpr_common_caps(struct intel_dp *intel_dp)
++{
++	memset(&intel_dp->lttpr_common_caps, 0, sizeof(intel_dp->lttpr_common_caps));
++}
++
+ static void intel_dp_reset_lttpr_count(struct intel_dp *intel_dp)
+ {
+ 	intel_dp->lttpr_common_caps[DP_PHY_REPEATER_CNT -
+@@ -95,8 +100,7 @@ static bool intel_dp_read_lttpr_common_caps(struct intel_dp *intel_dp)
+ 
+ 	if (drm_dp_read_lttpr_common_caps(&intel_dp->aux,
+ 					  intel_dp->lttpr_common_caps) < 0) {
+-		memset(intel_dp->lttpr_common_caps, 0,
+-		       sizeof(intel_dp->lttpr_common_caps));
++		intel_dp_reset_lttpr_common_caps(intel_dp);
+ 		return false;
+ 	}
+ 
+@@ -118,30 +122,49 @@ intel_dp_set_lttpr_transparent_mode(struct intel_dp *intel_dp, bool enable)
+ }
+ 
+ /**
+- * intel_dp_lttpr_init - detect LTTPRs and init the LTTPR link training mode
++ * intel_dp_init_lttpr_and_dprx_caps - detect LTTPR and DPRX caps, init the LTTPR link training mode
+  * @intel_dp: Intel DP struct
+  *
+- * Read the LTTPR common capabilities, switch to non-transparent link training
+- * mode if any is detected and read the PHY capabilities for all detected
+- * LTTPRs. In case of an LTTPR detection error or if the number of
++ * Read the LTTPR common and DPRX capabilities and switch to non-transparent
++ * link training mode if any is detected and read the PHY capabilities for all
++ * detected LTTPRs. In case of an LTTPR detection error or if the number of
+  * LTTPRs is more than is supported (8), fall back to the no-LTTPR,
+  * transparent mode link training mode.
+  *
+  * Returns:
+- *   >0  if LTTPRs were detected and the non-transparent LT mode was set
++ *   >0  if LTTPRs were detected and the non-transparent LT mode was set. The
++ *       DPRX capabilities are read out.
+  *    0  if no LTTPRs or more than 8 LTTPRs were detected or in case of a
+- *       detection failure and the transparent LT mode was set
++ *       detection failure and the transparent LT mode was set. The DPRX
++ *       capabilities are read out.
++ *   <0  Reading out the DPRX capabilities failed.
+  */
+-int intel_dp_lttpr_init(struct intel_dp *intel_dp)
++int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp)
+ {
+ 	int lttpr_count;
+ 	bool ret;
+ 	int i;
+ 
+ 	ret = intel_dp_read_lttpr_common_caps(intel_dp);
++
++	/* The DPTX shall read the DPRX caps after LTTPR detection. */
++	if (drm_dp_read_dpcd_caps(&intel_dp->aux, intel_dp->dpcd)) {
++		intel_dp_reset_lttpr_common_caps(intel_dp);
++		return -EIO;
++	}
++
+ 	if (!ret)
+ 		return 0;
+ 
++	/*
++	 * The 0xF0000-0xF02FF range is only valid if the DPCD revision is
++	 * at least 1.4.
++	 */
++	if (intel_dp->dpcd[DP_DPCD_REV] < 0x14) {
++		intel_dp_reset_lttpr_common_caps(intel_dp);
++		return 0;
++	}
++
+ 	lttpr_count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps);
+ 	/*
+ 	 * Prevent setting LTTPR transparent mode explicitly if no LTTPRs are
+@@ -181,7 +204,7 @@ int intel_dp_lttpr_init(struct intel_dp *intel_dp)
+ 
+ 	return lttpr_count;
+ }
+-EXPORT_SYMBOL(intel_dp_lttpr_init);
++EXPORT_SYMBOL(intel_dp_init_lttpr_and_dprx_caps);
+ 
+ static u8 dp_voltage_max(u8 preemph)
+ {
+@@ -817,7 +840,10 @@ void intel_dp_start_link_train(struct intel_dp *intel_dp,
+ 	 * TODO: Reiniting LTTPRs here won't be needed once proper connector
+ 	 * HW state readout is added.
+ 	 */
+-	int lttpr_count = intel_dp_lttpr_init(intel_dp);
++	int lttpr_count = intel_dp_init_lttpr_and_dprx_caps(intel_dp);
++
++	if (lttpr_count < 0)
++		return;
+ 
+ 	if (!intel_dp_link_train_all_phys(intel_dp, crtc_state, lttpr_count))
+ 		intel_dp_schedule_fallback_link_training(intel_dp, crtc_state);
+diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.h b/drivers/gpu/drm/i915/display/intel_dp_link_training.h
+index 6a1f76bd8c75..9cb7c28027f0 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.h
++++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.h
+@@ -11,7 +11,7 @@
+ struct intel_crtc_state;
+ struct intel_dp;
+ 
+-int intel_dp_lttpr_init(struct intel_dp *intel_dp);
++int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp);
+ 
+ void intel_dp_get_adjust_train(struct intel_dp *intel_dp,
+ 			       const struct intel_crtc_state *crtc_state,
+-- 
+cgit v1.2.3-1-gf6bb5
+
diff --git a/0005-drm-i915-Fix-modesetting-in-case-of-unexpected-AUX-timeouts.patch b/0005-drm-i915-Fix-modesetting-in-case-of-unexpected-AUX-timeouts.patch
new file mode 100644
index 0000000..8e1cc1d
--- /dev/null
+++ b/0005-drm-i915-Fix-modesetting-in-case-of-unexpected-AUX-timeouts.patch
@@ -0,0 +1,52 @@
+From 702d986d2a3b347a2d732a3fbfc9838dc70a2be7 Mon Sep 17 00:00:00 2001
+From: Imre Deak <imre.deak@intel.com>
+Date: Tue, 13 Apr 2021 02:24:12 +0300
+Subject: drm/i915: Fix modesetting in case of unexpected AUX timeouts
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+In case AUX failures happen unexpectedly during a modeset, the driver
+should still complete the modeset. In particular the driver should
+perform the link training sequence steps even in case of an AUX failure,
+as this sequence also includes port initialization steps. Not doing that
+can leave the port/pipe in a broken state and lead for instance to a
+flip done timeout.
+
+Fix this by continuing with link training (in a no-LTTPR mode) if the
+DPRX DPCD readout failed for some reason at the beginning of link
+training. After a successful connector detection we already have the
+DPCD read out and cached, so the failed repeated read for it should not
+cause a problem. Note that a partial AUX read could in theory partly
+overwrite the cached DPCD (and return error) but this overwrite should
+not happen if the returned values are corrupted (due to a timeout or
+some other IO error).
+
+Kudos to Ville to root cause the problem.
+
+Fixes: 7dffbdedb96a ("drm/i915: Disable LTTPR support when the DPCD rev < 1.4")
+References: https://gitlab.freedesktop.org/drm/intel/-/issues/3308
+Cc: stable@vger.kernel.org # 5.11
+Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Signed-off-by: Imre Deak <imre.deak@intel.com>
+---
+ drivers/gpu/drm/i915/display/intel_dp_link_training.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+index e6532ea5757b..6f2cb9d55e1b 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
++++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+@@ -843,7 +843,8 @@ void intel_dp_start_link_train(struct intel_dp *intel_dp,
+ 	int lttpr_count = intel_dp_init_lttpr_and_dprx_caps(intel_dp);
+ 
+ 	if (lttpr_count < 0)
+-		return;
++		/* Still continue with enabling the port and link training. */
++		lttpr_count = 0;
+ 
+ 	if (!intel_dp_link_train_all_phys(intel_dp, crtc_state, lttpr_count))
+ 		intel_dp_schedule_fallback_link_training(intel_dp, crtc_state);
+-- 
+cgit v1.2.3-1-gf6bb5
+
diff --git a/PKGBUILD b/PKGBUILD
index 71536b0..78824fb 100644
--- a/PKGBUILD
+++ b/PKGBUILD
@@ -23,8 +23,8 @@ _custom=1
 pkgbase=linux-ck
 _supver=5
 _majver=11
-_minver=11
-_gccpatchver='20210327'
+_minver=13
+_gccpatchver='20210402'
 _gccpatchger='10'
 _gccpatchker='5.8'
 _ckpatchversion=ck1
@@ -33,7 +33,7 @@ _ckpatchversion=ck1
   else
     pkgver=${_supver}.${_majver}.${_minver}
   fi
-pkgrel=1
+pkgrel=3
 pkgdesc='Linux-ck'
 url='https://kernel.org'
 #url='http://ck.kolivas.org/patches/'
@@ -51,7 +51,10 @@ source=(
   config         # the main kernel config file
   linux-ck-patch-${_supver}.${_majver}-${_ckpatchversion}.xz::http://ck.kolivas.org/patches/${_supver}.0/${_supver}.${_majver}/${_supver}.${_majver}-${_ckpatchversion}/patch-${_supver}.${_majver}-${_ckpatchversion}.xz
   0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch
-  0002-iommu-amd-Dont-initialise-remapping-irqdomain-if-IOMMU-is-disabled.patch
+  0002-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTTPRs.patch
+  0003-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-LTTPRs-are-detected.patch
+  0004-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-less-than-1.4.patch
+  0005-drm-i915-Fix-modesetting-in-case-of-unexpected-AUX-timeouts.patch
   kernel_gcc_patch-${_gccpatchver}.tar.gz::https://github.com/graysky2/kernel_gcc_patch/archive/${_gccpatchver}.tar.gz
   ath9k-regdom-hack.patch
   raid6-default-algo.patch
@@ -61,13 +64,16 @@ validpgpkeys=(
   '647F28654894E3BD457199BE38DBBDC86092693E'  # Greg Kroah-Hartman
 )
 # https://www.kernel.org/pub/linux/kernel/v5.x/sha256sums.asc
-b2sums=('e82eca6aee8e983304d363f6b427784df593f1fa8c2e7c54b0c6317e9a59497d4398dcec60a0e1ef7efd1f964e1c55a8ee2e3fb1fbf238a87917b30fc049f30b'
+b2sums=('fd9537a0eb265660ed25d12ff4098ca208035576c580f81cb6a1355eedde2748bdb65521641f68e626a1aee49e7494c79627015a376b7ee4a6373622605ac760'
         'SKIP'
-        '85f54fd2e5556d0932a9539782b45df5a7b23e09160efd94ef69ddd6dd31e7f17fd5c295fc88f443f8064d18c2465830cd5b2368a5c9c6a5329a74730b419ec7'
+        'afcd8fd51804e15082afe7964c5b8559414c76386dbe1dbfd50f38fe81c692528cf870557b0c6f905eef29415325f24d94c7f5a35cac70977c74bc8bea921ffb'
         '81d948aef4423255ebb4fa9b12c96207af8d14e225cf95d631dfbb1c0e88d31f60f81c2aff63046a78d8daf2601270ebb1d9cfaeccc3e3fdb08dbc430b53aff5'
         '2f9195675270d79d735a3aaec25887c2f80b76eae98be8fcc5fd59ab71d925c5ee20ec5e2a015deb68b61bc2cc7f56f546a22cb96ee038e2e24c2c9dd5c3f79f'
-        '9a00d496c6208bb7a5ffd9b64ef82cf3697ae86113a395be3f508402a99e9a1d46163614059e8e9bb58a66726b79fe5dbbab9ce9274d1508188f61f84ff3078b'
-        'f9a5de8af8ea693a21a824e3805c6d784d17ab72828000966a53ed46e66edce53a447271985634137e42901e41c4ac49d3f91e9262896668a335cea8ee896a7c'
+        '3ef315b3da8aa66e839ca7a52d1ccfcff033c7743e83aa7cc28be9ff2c557a5454a1da1acedd1c19d1731367bd0bd2646db34251d86a3f40548bccf2829f0a79'
+        '377c92be17d7adba145d0ffebd5c3e48171559d73f0112a2f66374a19819ec488ae2d5af70ae82ff945e4469e4d4e9cb690b671b7c07ba19e41d5f28f581a54b'
+        'd72dffddefb2eaa7867622fa34a05f342ea1ebba121207ff1046008b102b35370dd825337c22d18ccaf8d03e8c933084b09153b70fe212b041fd850f80989957'
+        '8277ecc477384fec1414f4ea5c091495ade7313076fcde835ad02bd117f19ddea0df55b52f3d95277735fe095b56dd4a7aceefbfd8ac8b3c1049c908d0612b84'
+        'b8c3ba685a7fa34f8b047467a41e2e78702c41e54469934515c7d2f221411b2357a7378b86edaf2ca7ce1a3f9b627878438ab1cfcdae4fc681f47021d9a813d9'
         'b6ef77035611139fa9a6d5b8d30570e2781bb4da483bb569884b0bd0129b62e0b82a5a6776fefe43fee801c70d39de1ea4d4c177f7cedd5ac135e3c64f7b895a'
         'fde132f3705d908e6f2147c78a2193289916d72304ca5efa2229d79fc3e57a857314ce94e71425caef2f7f7b6cf87f05ef86335dc8bd4be78e7035afe608005a')
 
@@ -88,7 +94,10 @@ prepare() {
   # Hotfixes
   echo "Applying hotfixes"
   patch -p1 -i ../0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch
-  patch -p1 -i ../0002-iommu-amd-Dont-initialise-remapping-irqdomain-if-IOMMU-is-disabled.patch
+  patch -p1 -i ../0002-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTTPRs.patch
+  patch -p1 -i ../0003-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-LTTPRs-are-detected.patch
+  patch -p1 -i ../0004-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-less-than-1.4.patch
+  patch -p1 -i ../0005-drm-i915-Fix-modesetting-in-case-of-unexpected-AUX-timeouts.patch
 
 
   # ck patch
diff --git a/config b/config
index e053bba..b0b25b4 100644
--- a/config
+++ b/config
@@ -1,6 +1,6 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# Linux/x86 5.11.3 Kernel Configuration
+# Linux/x86 5.11.13 Kernel Configuration
 #
 CONFIG_CC_VERSION_TEXT="gcc (GCC) 10.2.0"
 CONFIG_CC_IS_GCC=y
@@ -1941,7 +1941,7 @@ CONFIG_BT_BNEP_MC_FILTER=y
 CONFIG_BT_BNEP_PROTO_FILTER=y
 CONFIG_BT_CMTP=m
 CONFIG_BT_HIDP=m
-CONFIG_BT_HS=y
+# CONFIG_BT_HS is not set
 CONFIG_BT_LE=y
 CONFIG_BT_6LOWPAN=m
 CONFIG_BT_LEDS=y
@@ -3845,7 +3845,7 @@ CONFIG_KEYBOARD_ADP5520=m
 CONFIG_KEYBOARD_ADP5588=m
 CONFIG_KEYBOARD_ADP5589=m
 CONFIG_KEYBOARD_APPLESPI=m
-CONFIG_KEYBOARD_ATKBD=y
+CONFIG_KEYBOARD_ATKBD=m
 CONFIG_KEYBOARD_QT1050=m
 CONFIG_KEYBOARD_QT1070=m
 CONFIG_KEYBOARD_QT2160=m
@@ -4123,14 +4123,14 @@ CONFIG_RMI4_F55=y
 #
 # Hardware I/O ports
 #
-CONFIG_SERIO=y
+CONFIG_SERIO=m
 CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
-CONFIG_SERIO_I8042=y
+CONFIG_SERIO_I8042=m
 CONFIG_SERIO_SERPORT=m
 CONFIG_SERIO_CT82C710=m
 CONFIG_SERIO_PARKBD=m
 CONFIG_SERIO_PCIPS2=m
-CONFIG_SERIO_LIBPS2=y
+CONFIG_SERIO_LIBPS2=m
 CONFIG_SERIO_RAW=m
 CONFIG_SERIO_ALTERA_PS2=m
 CONFIG_SERIO_PS2MULT=m